Electrical Engineer James Edward Vigil
10+yrs Designer/Test Engineer: Communications, RF Digital Baseband, Medical Device, Avionics,
24FPGAs(9 DO254, 3 MILD-STD), 14 ASICs, 4 SOCs, Embedded System Test, C/C++/C#, Unix, Linux
FPGA: Xilinx Virtex5 QPRO, Spartan3A,Vivado2016, Virtex7 , Actel Fusion, A42MX, Lattice , Altera PLDs, NIOSII SOC Processor/FPGA, CycloneIII/iV/V FPGA, Cyclone(IV, V) Families.
10+yrs Designer/Test Engineer: Communications, RF Digital Baseband, Medical Device, Avionics,
24FPGAs(9 DO254, 3 MILD-STD), 14 ASICs, 4 SOCs, Embedded System Test, C/C++/C#, Unix, Linux
FPGA: Xilinx Virtex5 QPRO, Spartan3A,Vivado2016, Virtex7 , Actel Fusion, A42MX, Lattice , Altera PLDs, NIOSII SOC Processor/FPGA, CycloneIII/iV/V FPGA, Cyclone(IV, V) Families.
